1. Field of the Invention
This invention relates to computer systems and, more particularly, to methods and apparatus for utilizing sequential programming of memory cells in a flash electrically-erasable programmable read only memory (flash EEPROM) array in order to reduce the current and power utilized.
2. History of the Prior Art
There has been a recent trend toward lowering the power requirements of portable computers. In order to reduce power consumption, much of the integrated circuitry used in personal computers is being redesigned to run at low voltage levels. The circuitry and components used in portable computers are being designed to operate at voltage levels such as 5 volts and 3.3 volts and to use less current. This helps a great deal to reduce the power needs of such computers.
However, some of the features of portable computers require higher voltages. Recently, flash electrically-erasable programmable read only memory (flash EEPROM memory) has been used to store BIOS processes. This memory may be erased and reprogrammed without removing the BIOS circuitry from the computer by running a small update program when the BIOS processes are changed. However, erasing and reprogramming flash EEPROM memory requires approximately twelve volts to accomplish effectively; and the lower voltage batteries provided in personal computers are not capable of furnishing this voltage.
In other electronic arrangements, charge pump circuits have been used to provide a high voltage from a lower voltage source. However, even though charge pumps have long been available which are capable of providing the voltages necessary for programming and erasing flash EEPROM memory arrays, no arrangement had been devised until recently for utilizing these charge pumps to provide the voltages needed to accomplish erasing and programming of flash EEPROM memory arrays using those positive source erase techniques which are used when 12 volts is available from an external source.
The primary reason for the failure is the universal perception that insufficient current can be generated using charge pumps to accomplish the erase and the programming processes. The positive source method of erasing flash EEPROM memories draws a very substantial amount of current. Similarly, programming such arrays using traditional techniques has required large amounts of current. However, recently it has been discovered that using specially designed charge pumps sufficient current can be generated to accomplish positive source erase and the concomitant programming of flash EEPROM memory arrays. A charge pump arrangement for accomplishing positive source erase is disclosed in detail in U.S. patent application Ser. No. 08/119,423, entitled Method And Apparatus For A Two Phase Bootstrap Charge Pump, K. Tedrow et al, filed on even date herewith, and assigned to the assignee of the present invention.
It is still desirable even using this advanced charge pump to reduce the amount of current used in programming flash EEPROM memory arrays. A flash EEPROM memory array is made up of memory cells which include floating gate field effect transistor devices. Such memory transistors may be programmed by storing a negative charge on the floating gate. A negative charge on the floating gate shifts the threshold voltage of the memory transistor making it less conductive. The condition of the memory transistors (programmed or erased) may be detected by interrogating the cells and sensing whether current flows or not. The conventional method of erasing an array of flash EEPROM memory cells (called positive source erase) erases all of the cells together (or at least some large block thereof). Typically, this requires the application of twelve volts to the source terminals of all of the memory cells, the grounding of the gate terminals, and the floating of the drain terminals. The programing of memory cells is typically accomplished a word at a time but conventionally requires that the drain of selected cells be placed at six or seven volts, the gate at eleven or twelve volts, and the source at ground. This programing operation draws substantial current because the gate terminal is raised above the level of the drain and source terminals while a significant potential difference is placed between the drain and source terminals.
As mentioned, using conventional techniques, programming is accomplished a word at a time. The simultaneous programming of each bit of a sixteen bit word requires approximately one milliampere of current so that programming one word draws approximately sixteen milliamperes. The peak current drawn during the conventional programming operation may be as high as forty milliamperes. This is a very large amount of current and requires bigger charge pumps with larger capacitance if charge pump circuits are in fact to be used. These bigger charge pumps with large capacitance require a large amount of die space and therefore are counterproductive in producing portable computers. Moreover, integrated circuit charge pumps cannot be made to operate as efficiently as can stand alone charge pumps because they do not make use of elements such as inductors which maximize efficiency. In fact, such charge pumps operate at efficiencies of approximately forty percent so that seventy-two milliamperes of peak current are required to supply the sixteen milliamperes necessary for programming a word.